Illegal reference to net error

Illegal reference to net error

References

Reference NO 1

http://stackoverflow.com/questions/15186290/illegal-reference-to-net-error

Reference NO 2

http://search.edaboard.com/illegal-reference-net.html

Reference NO 3

http://www.naijafinder.com/threads/58948-Re-Verilog-code-error-Illegal-reference-to-net

Reference NO 4

http://www.edaboard.co.uk/viewtopic.php?t=15429

Reference NO 5

http://www.altera.com/support/kdb/solutions/rd12082011_714.html

Reference NO 6

http://www.rhinocerus.net/forum/lang-verilog/168354-illegal-reference-net.html

Reference NO 7

http://electronics.stackexchange.com/questions/22220/how-to-assign-value-to-bidirectional-port-in-verilog

Reference NO 8

http://only-vlsi.blogspot.com/2008/03/verilog-interview-questions-3.html